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The Opteron is AMD's x86 server processor line, and was the first processor to implement the AMD64 instruction set architecture (known generically as x86-64). It was released on April 22, 2003 with the SledgeHammer core (K8) and was intended to compete in the server market, particularly in the same segment as the Intel Xeon processor. Processors based on the AMD K10 microarchitecture (codenamed Barcelona) were announced on September 10, 2007 featuring a new quad-core configuration.
The two key capabilities
Opteron combines two important capabilities in a single processor die:
- native execution of legacy x86 32-bit applications without speed penalties
- native execution of x86-64 64-bit applications (linear-addressing beyond 4 GiB RAM)
The first capability is notable because at the time of Opteron's introduction, the only other 64-bit processor architecture marketed with 32-bit x86 compatibility (Intel's Itanium) ran x86 legacy-applications only with significant speed degradation. The second capability, by itself, is less noteworthy, as all major RISC makers (Sun SPARC, DEC Alpha, HP PA-RISC, IBM POWER, SGI MIPS, etc.) have had 64-bit implementations for many years. In combining these two capabilities, however, the Opteron has earned recognition for its ability to run the vast installed base of x86 applications economically, while simultaneously offering an upgrade-path to 64-bit computing.
The Opteron processor possesses an integrated DDR SDRAM / DDR2 SDRAM (Socket AM2/F) memory controller. This both reduces the latency penalty for accessing the main RAM and eliminates the need for a separate northbridge chip.
Multi-processor features
In multi-processor systems (more than one Opteron on a single motherboard), the CPUs communicate using the Direct Connect Architecture over high-speed HyperTransport links. Each CPU can access the main memory of another processor, transparent to the programmer. The Opteron approach to multi-processing is not the same as standard symmetric multiprocessing as instead of having one bank of memory for all CPUs, each CPU has its own memory. Thus the Opteron is a Non-Uniform Memory Access (NUMA) architecture. The Opteron CPU directly supports up to an 8-way configuration, which can be found in mid-level servers. Enterprise-level servers use additional (and expensive) routing chips to support more than 8 CPUs per box.
In a variety of computing benchmarks, the Opteron architecture has demonstrated better multi-processor scaling than the Intel Xeon[citation needed]. This is primarily because adding an additional Opteron processor increases bandwidth, while that is not always the case for Xeon systems, and the fact that the Opterons use a switched fabric, rather than a shared bus. In particular, the Opteron's integrated memory controller allows the CPU to access local RAM very quickly. In contrast, multiprocessor Xeon system CPUs share only two common buses for both processor-processor and processor-memory communication. As the number of CPUs increases in a Xeon system, contention for the shared bus causes computing efficiency to drop.
Multi-core Opterons
In May of 2005, AMD introduced its first "Multi-Core" Opteron CPUs. At the present time, the term "Multi-Core" at AMD in practice means "dual-core"; each physical Opteron chip actually contains two separate processor cores. This effectively doubles the computing-power available to each motherboard processor socket. One socket can now deliver the performance of two processors, two sockets can deliver the performance of four processors, and so on. Since motherboard costs go up dramatically as the number of CPU sockets increases, multicore CPUs now allow much higher performing systems to be built with more affordable motherboards.
AMD's model number scheme has changed somewhat in light of its new multicore lineup. At the time of its introduction, AMD's fastest multicore Opteron was the model 875, with two cores running at 2.2 GHz each. AMD's fastest single-core Opteron at this time was the model 252, with one core running at 2.6 GHz. For multithreaded applications, the model 875 would be much faster than the model 252, but for single threaded applications the model 252 would perform faster.
Next-Generation AMD Opteron processors are offered in three series: the 1200 Series (up to 1P/2-core), the 2200 Series (up to 2P/4-core), and the 8200 Series (4P/8-core to 8P/16-core). The 1200 Series is built on AMD's new Socket AM2. The 2200 Series and 8200 Series are built on AMD's new Socket F.
AMD launched quad core[1] Opteron chips on September 10th, 2007 [2] with hardware vendors to follow suit with servers in the following month. Based on a core design codenamed Barcelona, new power and thermal management techniques are planned for the chips. Existing dual core DDR2 based platforms will be upgradeable to quad core chips[3].
Socket 939
AMD has also released Socket 939 Opterons, reducing the cost of motherboards for low-end servers and workstations. Except for the fact they have 1 MiB L2 Cache (versus 512 KiB for the Athlon64) the Socket 939 Opterons are identical to the San Diego and Toledo core Athlon 64s, but are run at lower clockspeeds than the cores are capable of, making them more stable. They are also the only dual core Socket 939 processors still easily available now that the Athlon 64 X2s for that platform have been discontinued.
Micro-architecture update
The Opteron line saw an update with the implementation of the AMD K10 microarchitecture. New processors, launched in the third quarter of 2007 (codename Barcelona), incorporate a variety of improvements, particularly in memory prefetching, speculative loads, SIMD execution and branch prediction, yielding an appreciable performance improvement over K8-based Opterons, within the same power envelope.[4]
In the meantime, AMD has also utilized a new scheme to characterize the power consumption of new processors under "average" daily usage, named Average CPU Power (ACP).
Models
First generation single-core Opterons follow the three-digit "Opteron xyy" model numbers and going forward the newer generations (all dual cores) are four-digit in the form "Opteron xnyy".[5]
The first digit (the x) specifies the maximum number of CPUs on the target machine:
- 1 - Designed for uniprocessor systems
- 2 - Designed for dual-processor systems
- 8 - Designed for systems with 4 or 8 processors
The n digit is the release number (omitted in first release). The major differences between release one and release two include different socket type (socket 940 vs. socket F), single-core vs. dual core, quad-core upgradeability, support for DDR1 vs. DDR2 memory and for AMD Virtualization.
The last two digits in the model number (the yy) give an indication of the relative performance comparison among models of the processors.
Models with an HE label refers to a low-power deviative with 55W & 68W lower TDP value, while products with a SE label refers to a high performance processor with higher TDP values.
Opteron (130 nm SOI)
- Single-core — SledgeHammer (1yy, 2yy, 8yy)
- CPU-Steppings: B3, C0, CG
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 1024 KiB, fullspeed
- MMX, Extended 3DNow!, SSE, SSE2, AMD64
- Socket 940, 800 MHz HyperTransport
- Registered DDR SDRAM required, ECC possible
- VCore: 1.50 V - 1.55 V
- Max Power (TDP): 89 W
- First Release: April 22, 2003 [2]
- Clockrate: 1400 - 2400 MHz (x40 - x50)
Opteron (90 nm SOI, DDR)
- Single-core — Venus (1yy), Troy (2yy), Athens (8yy)
- CPU-Steppings: E4
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 1024 KiB, fullspeed
- MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64
- Socket 940, 800 MHz HyperTransport
- Socket 939/Socket 940, 1000 MHz HyperTransport
- Registered DDR SDRAM required for socket 940, ECC possible
- VCore: 1.35V - 1.4V
- Max power (TDP): 95W
- NX Bit
- 64-bit segment limit checks for VMware-style binary-translation virtualization.
- Optimized Power Management (OPM)
- First Release: February 14, 2005
- Clockrate: 1600 - 3000 MHz (x42 - x56)
- Dual-core — Denmark (1yy), Italy (2yy), Egypt (8yy)
- CPU-Steppings: E1, E6
- First Release: Spring 2005
- Clockrate: 1600 - 2800 MHz (x60, x65, x70, x75, x80, x85, x90)
- ...
- Socket 939/Socket 940, 1000 MHz HyperTransport
- ...
- NX bit
Opteron (90 nm SOI, DDR2)
- Dual-core — Santa Ana (12yy), Santa Rosa (22yy, 82yy)
- CPU-Steppings: F2, F3
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 2*1024 KiB, fullspeed
- MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64
- Socket F, ??? MHz HyperTransport - Opteron 2yy, 8yy
- Socket AM2, ??? MHz HyperTransport - Opteron 1yy
- VCore: ??????
- Max Power (TDP): 95W
- NX Bit
- AMD-V™ Virtualization
- Optimized Power Management (OPM)
- First Release: ?????? 2006
- Clockrate: ???? - ???? MHz (xn?? - xn??)
Opteron (65 nm SOI)
- Quad-core — Barcelona (23yy, 83yy)
- CPU-Steppings: BA
- L1-Cache: 64 + 64 KiB (Data + Instructions) per core
- L2-Cache: 512 KiB, fullspeed per core
- L3-Cache: 2048 KiB, shared
- MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, SSE4a
- Socket F, Socket AM2+, HyperTransport 3.0 (1.6 GHz-2.0 GHz)
- Registered DDR2 SDRAM required, ECC possible
- VCore: ?
- Max Power (TDP): ?
- NX Bit
- AMD-V™ Virtualization
- Split power plane dynamic power management
- VCore: 1.2 V
- First Release: September 10, 2007
- Clockrate: 1700 - 2000 MHz
Supercomputers
On the November 2007 TOP500 list, 15.8% of the world's 500 fastest known supercomputer installations were AMD64 Opteron-based systems (down from 22.6% on 11/06), while 64.4% were Intel ia32e/EM64T/Intel 64 Xeon-based.
Supercomputers based on Opteron mentioned in the top 10 fastest supercomputers in the world:
- #6: Sandia National Laboratories, USA. Red Storm - Sandia/ Cray Red Storm, AMD64 Opteron Dual Core 2400 MHz. Cray Inc. 26,569 total cores. Rpeak: 127.531 TeraFlops.
- #7: Oak Ridge National Laboratory, USA. Jaguar - Cray XT4/XT3. AMD64 Opteron Dual Core 2600 MHz (5.2 GFlops/unit). Cray Inc. 23,016 total cores. Rpeak: 119,350 TFlop.
- #9: NERSC/LBNL, USA. Franklin - Cray XT4. AMD64 Opteron Dual Core 2600 MHz. Cray Inc. 19,320 total cores. Rpeak: 100,464 TFlop.
Opteron without Optimized Power Management
AMD has released some Opteron processors without Optimized Power Management(OPM) support, which use DDR1 memory. The following table describes those processors lacking OPM.
Future
Future Opteron processors, will see an implementation of the Montreal core based on a 45 nm fabrication node, manufactured using the MCM technique. Further, the server line of processors will incorporate the newly announced Bulldozer core with native 4 cores or more configurations, each supporting SSE5 aimed at better HPC and cryptographic computations.
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